发明名称 Method and apparatus for optimizing a logic network
摘要 A system for optimizing a logic network including expressing the logic network as an original graph having vertices, edges which connect the vertices and which represent connections in the logic network, and inversion markings for representing inverters in the logic network; determining a fundamental cycle(s) in the original graph; sorting the determined fundamental cycle(s) according to its parity; forming a final graph by processing the fundamental cycle(s) so as to optimize inverter placement therein while maintaining the parity thereof; comparing the inversion markings of the original and final graphs to determine a set of transformation locations in the logic network; and re-configuring the logic network in accordance with the determined transformation locations.
申请公布号 US5282147(A) 申请公布日期 1994.01.25
申请号 US19910739923 申请日期 1991.08.02
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 GOETZ, JOHN W.;HATHAWAY, DAVID J.
分类号 G06F17/50;(IPC1-7):G06F15/60 主分类号 G06F17/50
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