发明名称 |
Semiconductor memory device with high speed transmission of address signals between a predecoder and a main decoder |
摘要 |
A semiconductor memory device including an address decode signal transmission circuit comprising address buffers; a predecoder; address buses provided before a main decode; a transmission circuit for outputting predecoded signals to the address buses while limiting amplitude thereof; and a receiving circuit provided before the main decoder for differentially amplifying signals from the address buses, wherein the memory cell array is divided into a plural number of sub-blocks and power can be selectively supplied to at least one of the sub-blocks.
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申请公布号 |
US5282173(A) |
申请公布日期 |
1994.01.25 |
申请号 |
US19920877923 |
申请日期 |
1992.05.04 |
申请人 |
SONY CORPORATION |
发明人 |
MIYAJI, FUMIO;MATSUSHITA, TAKESHI |
分类号 |
G11C5/14;G11C8/10;(IPC1-7):G11C8/00 |
主分类号 |
G11C5/14 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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