Stacked capacitor DRAM - has wiring layer which is used for top electrode of storage capacitor and for connecting to peripheral circuit in region separate from that contg. memory cell

摘要

Each memory cell on the substrate (10) consists of a capacitor with a top and a bottom electrode with an intermediate insulating layer and a MOSFET. On the substrate is formed a peripheral circuit section in a region different from that contg. the memory cell section. A wiring layer (27,29) serves as the capacitor top electrode. The wiring layer also serves the peripheral circuit section. It consists of a first (27) and a second layer (29), the first one of polycrystalline silicon, TiN, Ni and carbon. The second one is of WSi2, W, Ni, Al, and Cu, or is a multiple layer of selected Ti compounds. USE/ADVANTAGE - For data or information signal DRAM, with simple connection to substrate in peripheral circuit section contact hole.