发明名称 |
DIGITAL SIGNAL PROCESSOR ARCHITECTURE |
摘要 |
Processor architecture comprising a central processing unit CPU (2, 4), a program memory (1) and a data memory (3), the central processing unit being functionally composed of a program execution portion (1, 2) and a data processing portion (4), characterised in that, in order to reduce the number of components participating in the constitution of the processor, at least one element (6, 11, 12) of the program execution portion (1, 2) is disposed in the data processing portion (4). |
申请公布号 |
WO9401816(A1) |
申请公布日期 |
1994.01.20 |
申请号 |
WO1993GB01469 |
申请日期 |
1993.07.13 |
申请人 |
TEXAS INSTRUMENTS FRANCE;TEXAS INSTRUMENTS INCORPORATED |
发明人 |
CHAUVEL, GERARD;LAURENTI, GILBERT;CIROUX, JEAN;WENZINGER, YVES;DENT, PETER |
分类号 |
G06F9/30;G06F9/32;G06F15/78;H04B14/04;(IPC1-7):G06F9/38 |
主分类号 |
G06F9/30 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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