发明名称 TEST MODE CIRCUIT OF MEMORY DEVICE
摘要 PURPOSE: To grasp interference phenomenon between cells and data buses by changing information stored inside a memory device and reading it from the memory device. CONSTITUTION: During the test mode, a contact c of a mode selecting switch SW 21 is connected to a contact b, and an input data is impressed on the logical means 2LM1-2LMn of a logical part 200. The respective logical means decide a route by which input data is transferred to respective cell arrays by a clock signal(CLK) and input data is stored in the cell arrays CA1-CAn as it is when CLK is in a logical '1' state. In the meantime, when CLK is in a logical '0' state, input data is inverted and stored. When data stored in the arrays CA 1-CAn are read, the logical means 4LM and 4LM' of the logical part 400 read data as it is when CLK is '1' and read data after inversion when CLK is '0'. Thus, information simultaneously stored in the cells is optionally selected and interference phenomenon is grasped.
申请公布号 JPH065097(A) 申请公布日期 1994.01.14
申请号 JP19920357320 申请日期 1992.12.24
申请人 GOLD STAR ELECTRON CO LTD 发明人 ZON HO KIMU
分类号 G01R31/28;G11C29/26;G11C29/34;G11C29/36;G11C29/48;H01L21/66;(IPC1-7):G11C29/00;G01R31/318 主分类号 G01R31/28
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