Timing recovery scheme for a transceiver using a single sample clock source for transmitting and receiving signals

摘要

The present invention addresses a timing synchronization problem which arises in tandem modem operation when a single codec strobed by a common sample clock is used for A/D and D/A signal conversion in a modem. Tandem modem operation is defined as a system application when two modems have their RS-232 interfaces directly connected to one another. In accordance with the present invention, a digital interpolator connected to the A/D converter in the modem effectively alters the timing phase of the A/D converter in response to first and second control signals. The first control signal is generated in response to an externally supplied clock and an internal modem clock and is representative of any perturbations in the externally supplied clock with respect to the internal modem clock. The second control signal is generated in response to digital signals derived from the incoming analog signal from a remote modem and is representative of any residual asynchronism between the transmit sample clock of the remote modem and the modem's transmit sample clock after alteration by the digital interpolator in response to the first control signal alone.