发明名称 |
Methods of maintaining cache coherence and processor synchronization in a multiprocessor system using send and receive instructions |
摘要 |
For use with a multiprocessor system employing shared memory, a software controlled method maintains cache coherency and execution synchronization among processors. A processor executing a SEND instruction transfers a cache line to one or more processors executing a RECEIVE instruction in a synchronized manner. The processors also execute the SEND and RECEIVE instructions to synchronize the execution of iterations of a program loop whereby a control processor distributes indices of the iterations to be performed by each worker processor.
|
申请公布号 |
US5276828(A) |
申请公布日期 |
1994.01.04 |
申请号 |
US19890317538 |
申请日期 |
1989.03.01 |
申请人 |
DIGITAL EQUIPMENT CORPORATION |
发明人 |
DION, JEREMY |
分类号 |
G06F12/08;(IPC1-7):G06F12/12;G06F15/16 |
主分类号 |
G06F12/08 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|