发明名称 VIDEO SIGNAL PROCESSING CIRCUIT
摘要 <p>The video encoding/decoding circuit comprises; a decimation circuit decimating the input video signal by the factor of 1/M; a horizontal/vertical interpolating circuit interpolating the processed video signal by the factor of M; an encoder eliminating DC components by subtracting the output of a delay circuit and a horizontal interpolation circuit; a decoder reconstructing the original signal by adding the output of the delay circuit and the horizontal interpolation circuit.</p>
申请公布号 KR930011288(B1) 申请公布日期 1993.11.29
申请号 KR19910000747 申请日期 1991.01.17
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 OH, HUN - SOK
分类号 H04N7/12;H04N5/16;H04N7/24;H04N11/02;H04N19/00;H04N19/59;H04N19/80;H04N19/85;(IPC1-7):H04N5/16;H04N7/13 主分类号 H04N7/12
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