发明名称 APPARATUS AND METHOD FOR CONTROLLING OF POWER CONSUMPTION OF PROGRAMMABLE LOGIC DEVICE AS WELL AS LATCH MEANS
摘要 <p>PURPOSE: To selectively activate a logical signal output, and to reduce power consumption. CONSTITUTION: Each programmable switch 12 connected with one of programmable product item outputs is provided with an amplifier SA having an inversion input connected with one of the programmable product item outputs, a first transistor 12 connected between the amplifier SA and ground, and a first invertor 14 connected with the transistor. Also, this device includes a latch 20 connected with the invertor, a second transistor 16 connected with the latch 20, power-up reset circuit 10 connected with the transistor 16, and an electrically deletable programmable read only memory cell 25 connected with the second transistor 16 and the latch 20. In this method, each of the plural amplifiers is selectively activated.</p>
申请公布号 JPH05315943(A) 申请公布日期 1993.11.26
申请号 JP19910101374 申请日期 1991.05.07
申请人 ADVANCED MICRO DEVICDS INC 发明人 KUUOON OO TORIN;BINSENTO UIN;MAAKU KUWAN
分类号 G11C17/00;G11C16/06;H03K19/00;H03K19/173;H03K19/177;(IPC1-7):H03K19/177 主分类号 G11C17/00
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