| 摘要 |
<p>PURPOSE:To prevent a fact that a CPU of a local bus sets erroneously a write inhibition control register, when a CPU of a system bus is writing data, etc., in a write inhibition settable area. CONSTITUTION:As a circuit which can prevent a fact that a CPU of a local bus sets erroneously a write inhibition control register, when a CPU of a system bus is writing data, etc., in a write inhibition settable area, for instance, an OR circuit 106 and a control register 110 are inserted in series to an input line of a write inhibiting signal actuating signal to the write inhibition control register 107, and in the OR circuit 106, a write inhibition actuating signal *SET, and an output side 112 of an AND circuit 111 for inputting an input line 102 of a system bus selecting signal * SB and an input line 103 of a system bus write signal * SWT are connected to one input line 101 and the other input line, respectively, and an operation clock of the CPU of the local bus is inputted to 104 in one input of the inserted control register 110.</p> |
