| 摘要 |
<p>PURPOSE:To perform the arithmetic processing for the operation within an arithmetic block at such a high speed as to only requiring the time of delay which is specific to a transistor. CONSTITUTION:Within each arithmetic block 1, 2, 3, an operation is performed by the frequency of a clock CK0 to be generated by a clock generation circuit 4 (a ring oscillator, for instance) provided at the inside of a LSI. Data is inputted from input terminals I1 to I9 and the cylce of a clock CK2 synchronized with this input is more than three times of the cycle of the clock CK0. In a clock control circuit 5, the rise of a clock CK5 is detected, the three cycles of the clock CK0 is outputted as a clock CK1. As for the remaining time, a Low is continued to be outputted as a clock CK1. A three-input selector 11 selects the output by the cycle when an I1 side, an I2 side, an I3 side are successively synchronized with the clock CK. In the same way, three-input selectors 12, 13 also select the output successively.</p> |
