| 摘要 |
PURPOSE:To compact an emulator by controlling the reading operation of a brake condition and the writing operation of coverage information so as to time-dividedly execute them to/from a single memory. CONSTITUTION:In the case of executing brake condition setting and coverage relating to the execution address (PC address) of a processor in the first half of a clock cycle, a control part 3 allows an address switching part 2 to select a PC address 8 in accordance with a mode selection signal 16 and supplies the selected address 8 to a memory 1. Simultaneously with the assertion of an access strobe signal 12, the memory 1 is read out in order to acquire brake condition information. Data read out from the memory 1 are stored in a data register 7, and simultaneously a brake specifying part 5 judges whether both the brake conditions coincide with each other or not based upon the brake condition information. At the coincidence of both the brake conditions, a brake request signal 22 is asserted to a low level. In the latter half of the clock cycle, the coverage information is written in the memory 4 in accordance with the gate of the signal 12. |
