发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 <p>PURPOSE:To prevent a system from malfunctioning if the delay time of a delay circuit varies. CONSTITUTION:A timing generator 13 inputs the output of an oscillation circuit 11 and the output of the oscillation circuit 11 which is delayed by the delay circuit 12 and outputs a system clock. A counter A14 counts the output of the oscillation circuit 11. A counter B15 is controlled with the output of the counter A14 to count the output of the timing generator 13. A reset circuit 16 outputs a reset signal corresponding to the output of the counter B15. A delay time control circuit 18 controls the delay time of the delay circuit 12 according to the output of the counter B15 and the output of the timing generator 13.</p>
申请公布号 JPH05282066(A) 申请公布日期 1993.10.29
申请号 JP19920074222 申请日期 1992.03.30
申请人 发明人
分类号 G06F1/04;(IPC1-7):G06F1/04 主分类号 G06F1/04
代理机构 代理人
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