发明名称 MEMORY CIRCUIT CONTROL SYSTEM
摘要 PURPOSE:To refresh RAM with simple constitution by refreshing dynamic RAM by performing DMA operation by the DMA request input of a DMA controller. CONSTITUTION:To refresh dynamic RAM12, timer 13 sends DMA request signal (s) to DAM controller 14, which receives signal (s) and sends stop request (m) to receive stop answer signal (n) from CPU circuit 11. Then, bus occupation signal (p) is sent out to disconnect an address bus, data bus and control signal bus from CPU circuit 11. Next, DMA controller 14 sends refreshment answer signal (t), address signal (q) and control signal (r) to the buses. After refreshment DMA operation, RAM circuit 12 is refreshed. This constitution makes it possible to refresh RAM with simple circuit constitution.
申请公布号 JPS55139691(A) 申请公布日期 1980.10.31
申请号 JP19790044720 申请日期 1979.04.11
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 TSUNEDA MASAHIKO;HIRAO TOSHIROU
分类号 G06F13/28;G11C11/406 主分类号 G06F13/28
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