| 摘要 |
PURPOSE:To reduce a rough tuning time because the rough tuning is implemented at a high speed when a frequency step is large by varying a rough tuning output depending on a difference between a count of a counter and a setting frequency. CONSTITUTION:A subtractor 43 obtains a difference QDIF between a count QVCO by a counter 41 counting an oscillating frequency fVCO of a VCO and a preset frequency digital signal frequency DSET. The output data QDIF are inputted to digital comparators 44-47, in which how much the frequency fVCO is larger or smaller than upper and lower limit frequency data D1, D2, -D1, -D1 is obtained. That is, in the case of the frequency difference QDIF>D1 and the difference QDIF<-D1, since the frequency fVCO is sufficiently apart from the upper/lower limit frequency data, a large voltage +V1 or -V1 is outputted as a control signal VP and the rough tuning is implemented quickly. Thus, the rough tuning time when a frequency step is large is reduced by changing the rough tuning output in response to the difference between the count of the counter and the setting frequency. |
