摘要 |
PURPOSE:To improve the performance of a clock generating section in a feedforward system time axis correction circuit. CONSTITUTION:The generator consists of a reference clock generator 10, a variable delay circuit 11 comprising CMOS gates outputting a delay phase connected in multi-stage, and a phase comparator 12 detecting a deviation in a delay time generated by temperature fluctuation or the like of the delay circuit 11. An application power supply voltage to the CMOS gates 111-11n is generated by superimposing a control signal generated from a detected phase through an LPF 13 onto a reference power supply voltage by a voltage comparator 15. Thus, the delay time is adjusted and a phase being equal divisions of one clock period is generated. |