D=A converter with adjustable offset voltage output buffer - has buffer which amplifies sum of analogue voltage and offset voltage both generated according to digital input value

摘要

The output buffer (300) has nodes by which the offset is adjusted by the offset voltage generator (200). It comprises an operational amplifier with a feedback resistor between its output and the inverting input to which the offset voltage is applied. A current adjusting circuit controls the resistor current as a weighted sum of a p-bit digital input using p MOSFET - controlled transistor switches. The (n+p) bit input signal is divided so that the n most significant bits control the analogue voltage generator (100) while the remainder control the offset voltage. The analogue generator may be a digital decoder whose outputs control switches tapping from a potential divider. ADVANTAGE - Reduction in number of switches: p increase in additional parts for p extra bits.