发明名称 |
Method for fabricating self-aligned gate diffused junction field effect transistor |
摘要 |
A method for fabricating a self-aligned, gate diffused junction field effect transistor is provided which includes the steps of forming an n-type layer on an indium phosphide, semi-insulating substrate; forming spaced apart source/drain metal contacts on the n-type layer; forming a metal gate on the n-type layer between the spaced apart source/drain contacts, where the metal gate is insulated from the source/drain contacts and includes a metallic p-type dopant material; and forming a p-type region in the n-type layer beneath the metal gate so that the gate contact and the p-type region have coincident boundaries with respect to each other at the surface of the n-type layer. The method may also be employed to manufacture a bipolar transistor by allowing the self-aligned and diffused p-type region to extend through the n-type layer to the semi-insulating substrate.
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申请公布号 |
US5248626(A) |
申请公布日期 |
1993.09.28 |
申请号 |
US19920937916 |
申请日期 |
1992.08.28 |
申请人 |
THE UNITED STATES OF AMERICA AS REPRESENTED BY THE SECRETARY OF THE NAVY |
发明人 |
NGUYEN, RICHARD;HEWETT, CHARLES A. |
分类号 |
H01L21/225;H01L21/331;H01L21/337;H01L29/10;H01L29/45 |
主分类号 |
H01L21/225 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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