Phase-locked loop with automatic phase offset calibration.

摘要

A phase-locked loop having automatic internal phase offset calibration includes a voltage-controlled oscillator circuit for generating a recovered data signal in response to an error signal. A phase detector determines the phase difference between the recovered data signal and a reference data signal. The phase-locked loop further includes a charge pump circuit, coupled to the phase detector, for generating an error signal in response to the detected phase difference. The charge pump circuit includes first and second pump generators for respectively providing first and second sets of pump signals, with the pump generators being interconnected to facilitate generation of the error signal. The phase-locked loop is designed to alternate between operation in phase correction and phase calibration cycles. In each phase correction cycle an error signal is synthesized as described above on the basis of the most recent phase comparison. During each intervening phase calibration cycle a calibration network operates to adjust the second charge pump generator such that the first and second sets of pump signals are precisely balanced when the reference and recovered data signals have a predefined phase relationship. In a preferred embodiment the predefined phase relationship corresponds to that of the reference and recovered data signals being matched in phase. In this way inconsistencies in the operating characteristics of the pump generators are precluded from engendering steady-state phase alignment errors between the reference and recovered waveforms. <IMAGE>