发明名称 HIGH SPEED SYNCHRONIZATION DEMODULATOR
摘要 PURPOSE:To obtain the high speed synchronization demodulator establishing reception synchronization at a higher speed by applying delay detection to a fixed word inserted- synchronizingly into a signal, obtaining the correlation and detecting the signal depending on the level. CONSTITUTION:After an input signal R is subject to delay detection by a delay detector 1, a correlation device 2 obtains a correlation A between waveforms resulting from applying delay detection to a fixed word and a power detector 3 converts the correlation value A into a power value P. Then a frequency An is estimated by using a phase thetaA of the correlation value A at that time, a spectrum obtained by applying inverse modulation 8 and Fourier transformation 9 to the signal R, and a spectrum obtained by applying multiplication 13 and Fourier transformation 13 to the signal R. Furthermore, a phase error 68 is obtained from a signal RT, obtained by applying inverse modulation 17 to a fixed word, and a clock timing is estimated from a time when the power P is maximized, and the results are set to a carrier recovery device 21 and a clock recovery device 22 as initial values. Through the constitution above, a demodulated output with phase and clock synchronization taken is obtained just after the initializing and the reception synchronization is established at a higher speed.
申请公布号 JPH05244210(A) 申请公布日期 1993.09.21
申请号 JP19920044661 申请日期 1992.03.02
申请人 NEC CORP 发明人 IWASAKI HARUYA
分类号 H04L7/00;H04L27/22;H04L27/227 主分类号 H04L7/00
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