发明名称 TEST MEHTOD OF SEMICONDUCTOR I.C.
摘要 The method for manufacturing a test structure of a semiconductor integrated circuit includes the steps of forming a well by ion-implanting an impurity of the same type as that of a diffusion layer being an object to be measured on a portion on which a test pattern will be formed and performing a thermal treatment thereupon, forming a pocket by ion-implanting an impurity of an opposite type to that of the diffusion layer being an object to be measured into the inside of the well and performing a thermal treatment thereupon, forming the diffusion layer being the object to be measured by forming an insulating layer on the resultant structure, forming a contact window in a predetermined portion of the insulating layer, ion-implanting an impurity to be thermally treated, forming a first wiring by depositing and patterning a metal into the contact window, forming a second wiring by depositing an insulating layer, forming a via window and depositing to pattern a metal, so that the concentration of current is prevented to accurately measure the contact resistance.
申请公布号 KR930008643(B1) 申请公布日期 1993.09.11
申请号 KR19900012370 申请日期 1990.08.11
申请人 GOLDSTAR ELECTRON CO., LTD. 发明人 CHON, YONG - KWON
分类号 H01L21/66;(IPC1-7):H01L21/66;H01L21/90 主分类号 H01L21/66
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