| 摘要 |
PURPOSE:To preclude the possibility of malfunction of the phase adjustment circuit of a clock signal when the clock signal is extracted from a reception signal to recover data. CONSTITUTION:This phase adjustment circuit is a circuit which is provided with an identification recovery circuit 3 receiving a reception signal, with a delay differentiation circuit 7, a timing extract filter 4 receiving the output of the delay differentiation circuit 7, and with a phase variable circuit 6 adjusting the phase of the clock signal outputted from the timing extract filter 4 and which recovers a data signal by the identification recovery circuit 3 based on the clock signal outputted from the phase variable circuit 6, and which also is provided with a 1st exclusive OR circuit 8 detecting a phase difference between an input signal and an output signal of the identification recovery circuit 3, a 2nd exclusive OR circuit 9 receiving an output of the delay differentiation circuit 7 and the output of the 1st exclusive OR circuit 8, a comparator 11 receiving the output of the 2nd exclusive OR circuit 9 via a low pass filter 10, and a signal outputted from the comparator 11 by referencing a prescribed reference signal is used for a control signal of the phase variable circuit 6. |
