发明名称 PHASE INVERSION CURRENT MULTIPLYING/DEVIDING CIRCUIT
摘要 PURPOSE:To provide the phase inversion current multiplying/dividing circuit which can considerably decrease offset currents and prevents the polarity of signals from being inverted when any compounder is used. CONSTITUTION:First and second active load differential amplifiers 22 and 24 composed of differentially connected bipolar transistors and current mirror circuits are symmetrically constituted, and the plus input terminals of the first and second active load differential amplifiers 22 and 24 are set at the same potential. Then, those minus input terminals are set at the same potential, and the output terminal of the first active load differential amplifier 22 is used as a current input terminal. The common connected emitter of the first active load differential amplifier 22 is used as a divided current input terminal, the common connected emitter of the second active load differential amplifier 24 is used as a multiplied current input terminal, and the output terminal of the second active load differential amplifier 24 is used as a current output terminal.
申请公布号 JPH05233855(A) 申请公布日期 1993.09.10
申请号 JP19920030673 申请日期 1992.02.18
申请人 JAPAN RADIO CO LTD 发明人 YAMASHITA KAZUO;NAKAGAWA TOKU
分类号 G06G7/163;(IPC1-7):G06G7/163 主分类号 G06G7/163
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