| 摘要 |
The variable delay circuit for controlling delay time of signal waveform in a MOS integration circuit is composed of 3 delay parts (10,20,30) and 2 transmission gates (TG1,TG2). The first delay part delays the input signal. The second and third delay parts are activated by the control signals (A,B) after receiving the outputs of the delay parts (20,30). The transmission gates connected between outputs of the first or second and third delay parts turn on/off the outputs of the delay parts with the control signals (A,B). The first delay part includes at least one delay inverter connected in series, and the second and third delay parts include at least one non-delay inverter connected in series respectively.
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