| 摘要 |
<p>PURPOSE:To enable sufficient response to the gain change every transmission pulse repetitive period, by constituting the closed loop control circuit so that the error signal can be zeroed in the time within the pulse width of the pilot pulse signal. CONSTITUTION:The flip flop 17 and the counter 19 are reset at the pilot pulse front ridge. The gate circuit 18 is conducted and the clock pulse signal having sufficiently narrow width is fed to the counter 19, in comparison with the time width of pilot pulse signal. The count value of the counter 19 increases and the output of the D/A converter 20 is increased in step wise. As a result, the gain of the IF amplifier is increased in step and the output of the detector 12 is also increased in step. When this output reaches the video reference value, a set pulse is produced from the threshold circuit 16 to stop the count of the counter 19 and suitable gain can be kept.</p> |
