发明名称 VARIABLE LENGTH CODING DECODING CIRCUIT
摘要 <p>PURPOSE:To reduce the capacity of a decoding table ROM in the variable length decoding circuit in which a luminance signal and a chrominance signal are separated, DCT and quantization are applied to them, the luminance signal and the chrominance signal of an AC component of a DCT coefficient already quantized for a compressed picture element applying variable length coding to the quantized DCT coefficient converted into the same Huffman code are received as input data and the data are decoded into the quantized DCT coefficient of a fixed length. CONSTITUTION:The circuit is provided with a decoding table ROM 1 outputting an additional bit length decoding a Huffman code included in input data and a succeeding address fed back to an address input terminal and a quantization coefficient decoding section 3 decoding a fixed length quantized DCT coefficient from the additional bit and an additional bit length outputted from the decoding table ROM 1, and the decoding table ROM 1 is provided with plural common areas for the AC component of the luminance signal and the chrominance signal.</p>
申请公布号 JPH05207293(A) 申请公布日期 1993.08.13
申请号 JP19920038639 申请日期 1992.01.29
申请人 NEC HOME ELECTRON LTD 发明人 SUGIYAMA MIKIO
分类号 H03M7/40;G06T9/00;H03M7/42;H04N1/41;H04N11/04;H04N19/42;H04N19/423;H04N19/426;H04N19/44;H04N19/60;H04N19/625;H04N19/91 主分类号 H03M7/40
代理机构 代理人
主权项
地址