METHOD OF INITIALIZING DUAL PROCESSORS

摘要

The method for synchronizing the equal initial state of the dualized processors (Abbreviation D) in the large scale full electronic switching system comprises the 1st stage at which a stand-by D sends a demand message to a waiting D and the working D checks the connection of the state register and, if check fails, decides the failure of connecting D-channel, the 2nd stage at which the dualized operation control mode is decided, the 3rd stage at which the area to be equalized is checked and a memory is read and written at the same address, and the 4th stage at which the processor sleeps and passages over control to the 3rd stage.