发明名称 OUTPUT RIPPLE REDUCING CIRCUIT IN HIGH FREQUENCY INVERTER
摘要 PURPOSE:To reduce the output ripple with small and inexpensive structure by inserting an electrolytic condenser between both terminals of two condensers which are connected in series with each other. CONSTITUTION:3-phase AC voltages applied to input terminals U, V, W are rectified by 3-phase bridge rectifiers which are composed of thyristors 1-6, and supplied to both terminals of condensers 9, 10 which are connected in series via a choke coil 8. Charges which are stored in the condensers 9, 10 are alternately supplied to a load 11. An output ripple reducing circuit 29 which has a series circuit of an electrolytic condenser 27 and a fuse 28 is inserted between points P1 and P3, and the ripple component between the points P1 and P3 can be suppressed to 3% by employing approx. 300uF of the condenser 27.
申请公布号 JPS58198171(A) 申请公布日期 1983.11.18
申请号 JP19820081240 申请日期 1982.05.14
申请人 SHINKO DENKI KK 发明人 KOUNO HITOSHI;TAKAKADO YUUZOU;OKUNO ATSUSHI
分类号 H02M7/515 主分类号 H02M7/515
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