发明名称 D-BUS ADDRESS DETECTING CIRCUIT IN ELECTRONIC EXCHANGES
摘要 The invention detects the obstruction node and its exact address when there is a obstruction in data signals and control signals. The circuit comprises D-BUS sensing section (16) for detecting an error signal on D-bus and operating an obstructing signal, ASTCLK control section (17) for generating clock signal (ASTCLK1) using a control clock (ASTCCK) and a bus control signal (AST*), counter section (18) for decreasing initial values by clock signal (ASTCLK1) and data latch section (19) for latching a data of counter output by obstruction signal.
申请公布号 KR930007474(B1) 申请公布日期 1993.08.11
申请号 KR19900022893 申请日期 1990.12.31
申请人 KOREA TELECOMMUNICATIONS CORP.;KOREA ELECTRONICS & TELECOMMUNICATIONS RESEARCH INSTITUTE 发明人 CHOE, BYONG - CHOL;KWON, BO - SOP;SONG, KWANG - SOK
分类号 H04M3/00;H04M3/22;(IPC1-7):H04M3/22 主分类号 H04M3/00
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