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发明名称
APPARATUS AND METHOD FOR ELIMINATING FALSE CURRENT LIMIT TRIGGERING IN A GROUNDED SOURCE/EMITTER POWER SWITCHING CIRCUIT
摘要
申请公布号
EP0514064(A3)
申请公布日期
1993.08.11
申请号
EP19920304036
申请日期
1992.05.05
申请人
NATIONAL SEMICONDUCTOR CORPORATION
发明人
SZEPESI, TAMAS S.;BITTNER, HARRY J.
分类号
G05F1/10;H02H1/04;H02H7/12;H02M3/156;H03K17/082;(IPC1-7):H03K17/08
主分类号
G05F1/10
代理机构
代理人
主权项
地址
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