| 摘要 |
PURPOSE:To prevent production of a compression decoding error by providing a decoding stop time, matching the coding and decoding speed of transmission/ reception. CONSTITUTION:A coding circuit 4, address generating circuits 7, 10, a subtractor 8 and a transmission buffer memory 9 constitute a manes controlling the delay time of a compression data of a speed conversion transmission buffer memory smoothing a compressed data generated by compression coding at random, and sending the result to a transmission line, an address generating circuit 14, a subtractor 15, an address generating circuit 16 and a reception buffer memory 17 constitute a means detecting the delay time of the compressed data at the same period as the delay time detection period of the transmission buffer memory 9, and a decoding circuit 21 constitutes a means applying decoding at a speed over the compression coding processing speed and stopping the decoding while the readout of the compression data from the reception buffer memory 17 is stopped. Thus, the delay time in the transmission/reception buffer memories is supervised and controlled to provide a decoding stop time and the coding and decoding speed of transmission/reception are matched. |
