发明名称 LEVEL SHIFTING CIRCUIT
摘要 PURPOSE:To reduce power consumption, increase an operation speed, and improve the high-speed operation limit frequency of an output in terms of electric power and propagation time by varying load resistance with a low-voltage input signal level, and varying the current ability of a current source. CONSTITUTION:The level shifting circuit 4 consisting of a current control part 1 and a level shifting part 2 is used. Then, when a buffer input level VB rises up to a level H at a high speed, the short-circuit current flowing from and to the power source through a complementary type buffer transistor (TR) decreases. When the number of output terminals increases, the current consumed for current control is disregarded, so the current consumed by the level shifting circuit 4 is considered to be the same as usual, and the propagation time from the input of an output enable signal BK to DO output is shortened securely. Further, the short-circuit current of a buffer driver decreases, so the speed is increased in terms of current consumption and transmission time and the high-speed operation limit frequency of the output is improved in terms of electric power and transmission time.
申请公布号 JPS6083421(A) 申请公布日期 1985.05.11
申请号 JP19830191535 申请日期 1983.10.13
申请人 SUWA SEIKOSHA KK 发明人 KIMURA TOSHIO
分类号 H03K5/02;H03K19/00;H03K19/0185 主分类号 H03K5/02
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