| 摘要 |
<p>PURPOSE:To avoid the next writing from being started before the completion of reading by switching a read memory by providing a phase comparing and judging equipment and a selector. CONSTITUTION:At least more than three sets of memories 5, 6, and 7 are arranged in parallel, and one received data column is simultaneously written in each memory. Then, memory writing address control parts 1, 2, and 3 controls operates the plural memories 5, 6, and 7 by writing addresses having arbitrary different time phases. This system is equipped with a phase comparing and judging part 10 which compares and judges the plural writing control signals and the reading control signals when the reading of data is operated by a memory reading address control part 8 after the lapse of a time delayed a little from the transmission path delay time fluctuation of the data column from the completion of the writing of data, and a selecting circuit 9 which recognizes the phase compared and judged result, judges the time phase margin of the writing and reading, selects the memory, and reads the data.</p> |
