发明名称 FAULT DIAGNOSTIC SYSTEM FOR UPC CIRCUIT
摘要 <p>PURPOSE:To provide the fault diagnostic synchronizing signal for a UPC circuit diagnosing properly a fault of the UPC circuit. CONSTITUTION:The fault diagnostic synchronizing signal for a UPC circuit controlling a cell flow based on specified information with respect to a cell traffic is provided with an active system UPC circuit W applying policing control to m-kinds of cells and a standby system UPC circuit P applying policing control to n-kinds of cells, decides policing by 2 systems or over with respect to one kind of cell or over and compares the result of decision to diagnose a fault of the UPC circuit. Furthermore, the traffic is measured by 2 systems or over with respect to one kind of cell or over and the fault of the UPC circuit is diagnosed by comparing the traffic measured values. Furthermore, q-sets of bridge memories storing prescribed information of the arrived cells in time series are provided and a fault of the bridge memory is diagnosed by comparing the content of the bridge memory by 2 systems or over.</p>
申请公布号 JPH05191433(A) 申请公布日期 1993.07.30
申请号 JP19920003022 申请日期 1992.01.10
申请人 FUJITSU LTD;NIPPON TELEGR & TELEPH CORP <NTT>;HITACHI LTD 发明人 AMAMIYA SHIGEO;OGURA TAKAO;NAKAJO TAKAFUMI;TAKEO HIROSHI;KUSAYANAGI MICHIO;YAMANAKA NAOAKI;SATO YOICHI;TAKASE MASAHIKO;SHINADA SHIGEO;TAKANO MITSUHIRO;SAITO KIYOSHI;HOBARA KAZUHIKO;OKABE TETSUHIRO
分类号 G06F11/20;H04L12/56 主分类号 G06F11/20
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