发明名称 INSTRUCTION SUPPRESSING CIRCUIT FOR INFORMATION PROCESSOR
摘要 PURPOSE:To suppress the execution of a software instruction without requiring any special microprogram routine when detecting any exception concerning a variable length operand instruction or a character string instruction, etc. CONSTITUTION:A mode F/F 7 is provided to suppress the update of a register for software and the write of a main memory, microaddress stack registrer 5 is provided to store the address of the next microprogram when the microprogram to set the mode F/F 7 is executed and further, microaddress control circuit 6 is provided for continuing the execution from the microprogram at the microaddress stored in the microaddress stack register 5 when the am to reset the mode F/F 7 is executed while the mode F/F 7 is set. Thus, the execution of the software instruction can be suppressed without providing any special exception detecting program routine.
申请公布号 JPH05181672(A) 申请公布日期 1993.07.23
申请号 JP19910360127 申请日期 1991.12.27
申请人 NEC IBARAKI LTD 发明人 YAMAZAKI TAKUMI
分类号 G06F9/34;G06F9/22;G06F11/00 主分类号 G06F9/34
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