| 摘要 |
<p>PURPOSE:To provide a large-scale integrated circuit device which is reduced in power consumption. CONSTITUTION:An address signal decoding circuit 3 which decodes the address signal from the address bus on a system bus and outputs the result, a bus control circuit 2 which outputs an output control signal 311, a pull-up control signal 321, and an input control signal 331 as input/output control signals for data by inputting an internal device select signal 611 as the output signal of the address signal decoding circuit 3 and a data write signal 221 or data read signal 231, a two-way buffers 11 and tri-state buffers 12 and 13 which control the input and output of the data with an output control pull-up control signal 321 and input control signal 331 are integrated in an LSI chip 1.</p> |
