| 摘要 |
An integrated circuit limits simultaneous switching output noise. Within the integrated circuit, a plurality of output pads are connected to an output holding register. The output holding register includes a plurality of flip-flops. Each flip-flop has a clock input, a data input, and a data output. The data output is connected to an output pad from the plurality of output pads. Various amounts of propagation delay are introduced in a clock signal before the clock signal reaches the clock inputs of the flip-flops.
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