发明名称 Process for fabricating layered superlattice materials
摘要 A precursor comprising a metal 2-ethylhexanoate in a xylenes solvent is applied to an integrated circuit wafer. The wafer is baked to dry the precursor, annealed to form a layered superlattice material on the wafer, then the integrated circuit is completed. If the metal is titanium, the precursor comprises titanium 2-methoxyethoxide having at least a portion of its 2-methoxyethoxide ligands replaced by 2-ethylhexanoate. If the metal is a highly electropositive element, the solvent comprises 2-methoxyethanol. If the metal is lead, bismuth, thallium, or antimony, 1% to 75% excess metal is included in the precursor to account for evaporation of the oxide during baking and annealing.
申请公布号 AU3272393(A) 申请公布日期 1993.07.19
申请号 AU19930032723 申请日期 1992.12.08
申请人 SYMETRIX CORPORATION 发明人 CARLOS A. PAZ DE ARAUJO;JOSEPH D CUCHIARO;MICHAEL C SCOTT;LARRY D. MCMILLAN
分类号 B05D1/00;B05D3/04;B05D7/24;C01G35/00;C23C16/44;C23C16/448;C23C16/455;C23C16/46;C23C16/48;C23C16/52;C23C18/12;C23C26/02;C30B7/00;H01C7/10;H01L21/02;H01L21/314;H01L21/316;H01L21/822;H01L21/8242;H01L21/8246;H01L21/8247;H01L27/04;H01L27/10;H01L27/105;H01L27/108;H01L27/115;H01L29/788;H01L29/792;H01L41/24;H05K3/10 主分类号 B05D1/00
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