PULL-DOWN CIRCUIT

摘要

PURPOSE: To provide a BiCMOS gate pull-down circuit for which the downside switching performance of load capacitance is improved. CONSTITUTION: Two PFET (T10 and T11 ) are serially connected as inputs to a base B of npn type bipolar transistor Q1 . A collector C and an emitter E of bipolar transistor Q1 are respectively connected to a circuit output and the ground. Between the serially connected PFET, one T11 is partitioned by a preset input signal and the other T10 is controlled by the output of refusal circuit 30 coupled to the collector C of bipolar transistor Q1 . When the bipolar transistor Q1 is saturated, the refusal circuit 30 interrupts the inflow of electric charges to the base B of bipolar transistor Q1 and an NFET T12 connected between the base B and the ground starts releasing the electric charges from the base to the ground.