| 摘要 |
The driver circuit corrects the edge of clock signal at an input part (Vin) and before outputting to prevent the clock signal distortions, thereby maintaining a high speed operation. The circuit comprises a reference voltage generator (50) integrating an input clock signal, a capacitor and a resistor (1,11) for strengthening an edge of the input clock signal, a bias current supply (60), a differential amplifier (70) for amplifying the input clock signal with the reference voltage (Vref), a buffer (80) for buffering two output signals from the amplifier (70), a clock edge compensator (90) for differentiating two output signals from the buffer to output an edge compensation signal, and an output driver (100) for compensating the output signals of the buffer by using the edge compensation signal.
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