发明名称 COMPLEMENTARY LOGIC WITH N-CHANNEL OUTPUT TRANSISTORS
摘要 A gate having a complementary input stage (12) and an N-channel push-pull output stage (14). This circuit is faster than a circuit with a single complementary stage because the N-channel transistors can bring the load capacitance more quickly than P-channel transistors can. A fundamental aspect of the invention is the replacement of the input P-channel input transistors (182) of standard logic circuits, particularly CMOS, with a two N-channel and one P-channel transistor input circuit (184). The circuit may use field effect transistors exclusively as elements.
申请公布号 WO9313600(A1) 申请公布日期 1993.07.08
申请号 WO1992US11278 申请日期 1992.12.29
申请人 HONEYWELL INC. 发明人 FULKERSON, DAVID, E.
分类号 H03K19/20;H03K19/0175;H03K19/0948;H03K19/0952;H03K19/21 主分类号 H03K19/20
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