摘要 |
A gate having a complementary input stage (12) and an N-channel push-pull output stage (14). This circuit is faster than a circuit with a single complementary stage because the N-channel transistors can bring the load capacitance more quickly than P-channel transistors can. A fundamental aspect of the invention is the replacement of the input P-channel input transistors (182) of standard logic circuits, particularly CMOS, with a two N-channel and one P-channel transistor input circuit (184). The circuit may use field effect transistors exclusively as elements. |