| 摘要 |
PURPOSE:To simplify the number of host computer data transfer permission signal generating circuits at the time of parallel operation of magnetic bubble memory devices by providing n-units of data buffers for one magnetic bubble memory device. CONSTITUTION:The first data buffers 3a, 4a and the second data buffers 3b, 4b, n-units each having capacity for one page are connected in parallel between a host computer 1 and m-units of magnetic bubble memory devices 6a, 6b. At the same time, a DTRQ signal generating circuit 29 that outputs a data transfer permission DTRQ signal to the host computer 1 is connected to n-units of the first data buffer 3b and the second data buffer 4b connected to m-th magnetic bubble memory device 6b. |
