Signal translator for interconnecting CMOS and BiCMOS logic gates

摘要

A signal translator circuit receives digital input signals of one voltage polarity and translates them to digital output signals of an opposite polarity. One embodiment of the translator converts conventional CMOS signal levels of +5 and 0 volts to modified CMOS signal levels of 0 and -5.2 volts. Another embodiment of the translator converts the 0 and -5.2 volt signals to the +5 and 0 volt signals. Both embodiments of the translator are made of transistors whose breakdown voltage only slightly exceeds +5 volts.