| 摘要 |
PURPOSE:To prevent any adverse effect due to an excessive elimination from being produced by impressing a negative potential voltage on the word lines when electrically erasing the given data which are written in a memory cell group in advance. CONSTITUTION:A MOS transistor is provided for connecting the gate to word lines WLIII and WLII of a memory cell group CB. This MOS transistor and the source of each memory cell C in the memory cell group CB are commonly connected, and at the same time, the memory cell group CB including this MOS transistor is formed in a well. Then, when the given data written in this memory cell group CB in advance are erasure electrically, a negative potential voltage is impressed on the word lines WLIII and WLII. Thus, while suppressing any increase in the size of the memory cell C, the adverse effect due to the excessive erasure can be prevented from being produced. |
