发明名称 RESET INFORMATION STORAGE CIRCUIT
摘要 PURPOSE:To study the cause of the down of a system, etc., and to improve the reliability of the system by storing the reset information in a buffer and then reading it out with no influence given to the state of a CPU. CONSTITUTION:A CPU 1 is provided together with a buffer 7 which stores the reset information showing the resetting factor of the CPU, 1 the storage means 7 and 9 which store the reset information in the buffer 7 with the reset factor signal used as a trigger after the reset factor signal to be outputted to the CPU 1 is inputted to the buffer 7, and a means 1 which reads the reset information out of the buffer 7 via the means 7 and 9.
申请公布号 JPH05150866(A) 申请公布日期 1993.06.18
申请号 JP19910316713 申请日期 1991.11.29
申请人 TOSHIBA CORP 发明人 NAKAMURA MASAYOSHI
分类号 G06F1/24;G06F11/14;G06F11/34 主分类号 G06F1/24
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