| 摘要 |
PURPOSE:To store defective data of an MUT (memory to be tested) into a memory at the operating rate of a memory tester and to read out thus stored data. CONSTITUTION:A pattern generating circuit 1 applies a test pattern 1B onto an MUT 2 and an output 2A therefrom is fed to a decision circuit 3. An output 3A from the decision circuit 3 is fed to an FIFO memory circuit 4 and when read out from a memory circuit 6 is interrupted temporarily, a selection circuit 5 selects an output 4A from the FIFO memory circuit 4. An address data to be written from the FIFO memory 4 into the memory circuit 6 is then read out and a logical value '1' is written at an address of the memory circuit 6 corresponding to a defective address of the MUT 2 thus reading out the content of the memory circuit 6 when the MUT 2 is being checked. |
