发明名称 WIRING SUBSTRATE MANUFACTURING METHOD
摘要 Provided are a wiring substrate, in which a plurality of conducting layers for forming a wiring pattern are laminated through insulating layers and in which the conducting layers are conductively connected through a via fill, and a method for manufacturing the wiring substrate. This manufacturing method comprises the via fill forming step of forming a via fill (17) by causing an electroless plating liquid to contact the surface of the wiring pattern, which is exposed to the bottom of a via hole (14) formed in the insulating layer and by laminating the plated metal film from the bottom of the via hole (14) to the opening of the via hole (14), and the wiring pattern forming step of forming an electroless-plated metal film (20) to become the wiring pattern, over a substrate (10) having the via fill (17) formed therein.
申请公布号 WO2009004855(A1) 申请公布日期 2009.01.08
申请号 WO2008JP57781 申请日期 2008.04.22
申请人 C. UYEMURA & CO., LTD.;HOTTA, TERUYUKI;MORIMOTO, SHUSHI;ISHIZAKI, TAKAHIRO;YAMAMOTO, HISAMITSU 发明人 HOTTA, TERUYUKI;MORIMOTO, SHUSHI;ISHIZAKI, TAKAHIRO;YAMAMOTO, HISAMITSU
分类号 H05K3/46;H05K1/11;H05K3/40 主分类号 H05K3/46
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