发明名称 REDUCTION CODING CIRCUIT OF QUANTUMIZE DATA
摘要 A coding circuit reduces the bit rate and the dynamic range by using the middle value of the quantized data. The coding circuit comprises a classifier (10) for classifying the quantized data in amplitude order, a latch section (20) for storing the classified value, a subtracter section (30) for calculating the difference between the stored quantizing data and the middle value of them, a max. bit number calculating section (40) for calculating the min. bit number to accept the max. output value of the subtracter section, a bit number reducing section (50) for receiving the min. output data bit of the subtracter section and producing the serial data, and a buffer (60) for storing the serial output value.
申请公布号 KR930004863(B1) 申请公布日期 1993.06.09
申请号 KR19900021212 申请日期 1990.12.20
申请人 GOLDSTAR CO., LTD. 发明人 WON, CHI - SON
分类号 H03M7/00;(IPC1-7):H03M7/00 主分类号 H03M7/00
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