Noise supression in memory device

摘要

This invention relates to an arrangement method of signal lines o1, o2, o3, o4 of a peripheral circuit of a memory array block within a chip in a semiconductor memory device wherein shield wirings S1, S2, S3 are inserted between signal lines, so that a noise transmission path caused by coupling capacitance between adjacent signal lines is cut off, and therefore, the noise generated at each signal line of the peripheral circuit of the memory array block is suppressed. Shield wiring may be installed also between first and second signal line groups. Thus, malfunction of the chip may be prevented and the reliability of the semiconductor memory device can be improved.