发明名称 Transient voltage suppressor and its manufacturing method
摘要 A transient voltage suppressor and its manufacturing method are provided, which can easily control voltage withstanding characteristics of a Zener diode by analogizing growth of a buried layer by forming a portion of the buried layer by performing ion implantation on a first epitaxial layer and then forming the other portion of the buried layer while depositing a second epitaxial layer having the same impurity concentration with the first epitaxial layer, and which can improve a current distribution characteristic by forming a doping region in a ring shape to increase a current pass region by increasing a PN junction area of a Zener diode in a small area.
申请公布号 US9391058(B2) 申请公布日期 2016.07.12
申请号 US201414503622 申请日期 2014.10.01
申请人 KEC Corporation 发明人 Kim Hyun Sik;Jang Hee Won
分类号 H01L29/861;H01L27/02 主分类号 H01L29/861
代理机构 代理人
主权项 1. A transient voltage suppressor comprising: a substrate of a first conductivity type; a first epitaxial layer of the first conductivity type, formed on a first surface of the first conductivity type substrate; a second epitaxial layer of the first conductivity type, formed on a first surface of the first conductivity type first epitaxial layer; a buried layer of a second conductivity type, interposed between the first conductivity type first epitaxial layer and the first conductivity type second epitaxial layer; a doping region of the first conductivity type, inwardly formed from a first surface of the first conductivity type second epitaxial layer; a doping region of the second conductivity type, inwardly formed from the first surface of the first conductivity type second epitaxial layer and spaced apart from the first conductivity type doping region; and a first electrode covering a first surface of the first conductivity type doping region and a first surface of the second conductivity type doping region and electrically connecting the first conductivity type doping region and the second conductivity type doping region, wherein the first conductivity type first epitaxial layer and the first conductivity type second epitaxial layer have lower impurity concentrations than impurity concentration of the first conductivity type substrate.
地址 Seoul KR